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Description: HDLC接口的实现,用VHDL写的,带有文档!
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Size: 177173 |
Author: 刘志刚 |
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Description: HDLC通信模块发送接收模块VHDL源码
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Size: 3582 |
Author: ditto |
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Description: This a VHDL implementation of an HDLC controller
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Size: 180892 |
Author: jason huang |
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Description: 采用VHDL实现HDLC协议
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Size: 46882 |
Author: kaka625 |
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Description: vhdl编程例子,很好的源码,值得一看 。-vhdl programming examples and a good source, an eye-catcher, an eye-catcher.
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Size: 168960 |
Author: 吴义军 |
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Description: 台湾国家晶元设计中心VHDL内部培训资料(CIC)-crystal yuan of Taiwan Design Center VHDL internal training materials (CIC)
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Size: 3020800 |
Author: 20032211 |
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Description: Verilog HDL硬件描述语言
01简介.PDF
02HDL指南.PDF
03语言要素.PDF
04表达式.PDF
05门电平模型化.PDF
06用户定义原语.PDF
07数据流模型化.PDF
08行为建模.PDF
09结构建模.PDF
10其它论题.PDF
11验证.PDF
12建模实例.PDF
13语法参考.PDF-Verilog HDL Hardware Description Language Introduction 01. PDF 02HDL Guide. PDF 0 3 language elements. PDF 04 expressions. PDF 05-level modeling. PDF 06 user-defined primitives. P DF 07 data flow modeling. PDF 08 behavior modeling. PDF 09 modeling structure. PDF 10 other topics . PDF 11 certification. PDF 12 model. PDF 13 syntax reference. PDF
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Size: 4837376 |
Author: 高 |
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Description: 在论坛上找到的一些VHDL的程序,很多,大家可以下下来看一下。-At the forum to find some of VHDL procedures, many, we can look at under the circumstances.
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Size: 43008 |
Author: 韩丹 |
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Description: 完成ccitt crc的校验。针对hdlc协议控制器编写的crc校验模块。通过了仿真测试-Ccitt crc checksum completed. HDLC protocol controller for the preparation of the CRC checksum module. Through the simulation test
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Size: 1024 |
Author: |
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Description: HDLC的一些相关文档,可能对HDLC设计有很大的帮助!-HDLC some relevant documents, HDLC design may be very helpful!
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Size: 47104 |
Author: guolh |
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Description: 高级链路控制的HDLC发送,写的还行,需要使用93版本的VHDL格式-Advanced Link Control HDLC to send, write that still need to use the 93 version of the VHDL format
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Size: 3072 |
Author: 宋珂 |
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Description: E1到HDLC转换 实现E1到以太网
E1到HDLC转换 实现E1到以太网-E1 TO HDLC E1 TO ETHETH
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Size: 449536 |
Author: robincyh |
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Description: 用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料-Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructions, easy to read. Can be ported to Altera and Xilinx areas such as chip manufacturers are doing to FPGA-based very good information network design
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Size: 11264 |
Author: 卓福洲 |
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Description: FPGA的入门级资料 讲的很好 不错 hdlc的实现-fpga
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Size: 2253824 |
Author: wangyang |
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Description: 一种带有CRC校验、一次可连续发送1-15块16字节数据、带有曼彻斯特码的hdlc收发程序,在Altera中仿真并在实际芯片中试验过的程序-One kind with a CRC check, send a continuous block of 16 bytes of data 1-15, with Manchester' s hdlc receive procedures in the Altera chip simulation and tested in the actual process
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Size: 6144 |
Author: 周宽裕 |
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Description: HDLC code in vhdl working code
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Size: 39936 |
Author: hr |
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Description: HDLC 高级数据链路协议的源文件,用vhdl些的-HDLC 高级数据链路协议的源文件
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Size: 190464 |
Author: wh |
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Description: 这是VHDL语言编写的实现 HDLC通信协议的源代码-This is the HDLC communications protocol source code written in VHDL language
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Size: 10240 |
Author: sean |
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Description: 主要是HDLC控制器,VHDL写的,个人觉得比较重要.-It s important for HDLC control design
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Size: 401408 |
Author: 程维 |
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Description: 基于FPGA的hdlc协议控制器的实现,用vhdl语言编写。-FPGA-based implementation of hdlc protocol controller, using vhdl language.
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Size: 6144 |
Author: zizi |
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